[{"data":1,"prerenderedAt":398},["ShallowReactive",2],{"blog-pcb-design-guide-en":3,"header-nav-en":75},{"title":4,"description":5,"date":6,"lastUpdated":6,"category":7,"image":8,"readingTime":9,"wordCount":10,"timeRequired":11,"htmlContent":12,"tags":13,"slug":21,"jsonld":22},"PCB Design Guide: From Schematic to Fab-Ready Layout","A step-by-step PCB design guide covering stackup, placement, routing, DFM checks and the files a manufacturer needs to quote and build your board.","2026-10-01","technology","/assets/img/materials/circuit-board-design-1.webp",12,2275,"PT12M","\u003Cp>\u003Cstrong>PCB design\u003C/strong> turns a schematic into a physical board that a factory can build and an assembler can populate. The work runs in a fixed order: capture the circuit, choose the board outline and stackup, place components, route connections, check the layout against manufacturing rules, and release a controlled set of files. Most respins come from decisions made out of that order, such as routing before the stackup is fixed or placing parts before the enclosure is known.\u003C/p>\n\u003Cp>This guide walks through the PCB design process step by step and shows, at each stage, which manufacturing constraint you should check before moving on. It is an overview of the whole flow. For a line-by-line layout checklist, use the \u003Ca href=\"/en/blog/dfm-guidelines-for-pcb-layout\">PCB layout DFM guidelines\u003C/a>.\u003C/p>\n\u003Ch2 id=\"key-takeaways\" data-anchor-en=\"key-takeaways\">Key takeaways\u003C/h2>\n\u003Cul>\n\u003Cli>Circuit board design is a sequence of commitments. Fix the outline, stackup, and placement before detailed routing, because each later step depends on them.\u003C/li>\n\u003Cli>Pick your manufacturer's capability early and load it as your design rules. A clean DRC only proves the layout matches the rules you entered.\u003C/li>\n\u003Cli>Choose layer count from routing density, reference planes, and package escape, not from habit.\u003C/li>\n\u003Cli>Place for assembly as well as for signals: orientation, clearances, fiducials, test access, and thermal mass all affect yield.\u003C/li>\n\u003Cli>Run DFM checks on the generated outputs, not only on the CAD database.\u003C/li>\n\u003Cli>Release one controlled package: fabrication data, drill, stackup, drawing, netlist, and assembly data at matching revisions.\u003C/li>\n\u003C/ul>\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003Ch2 id=\"what-is-pcb-design\" data-anchor-en=\"what-is-pcb-design\">What is PCB design?\u003C/h2>\n\u003Cp>PCB design is the engineering work that defines a printed circuit board's copper pattern, layer structure, holes, outline, and assembly data. It starts after the schematic exists and ends when the manufacturing files are released. A good PCB layout meets electrical requirements (signal integrity, power delivery, EMC), mechanical requirements (outline, connectors, mounting holes, height limits), thermal requirements, and the process limits of the factory that will build it.\u003C/p>\n\u003Cp>Schematic design and PCB layout are often done by different people. The schematic says \u003Cem>what\u003C/em> connects to what. The layout decides \u003Cem>where\u003C/em> every part sits and \u003Cem>how\u003C/em> each connection is made in copper. Both feed the same release package.\u003C/p>\n\u003Ch2 id=\"pcb-design-process-step-by-step\" data-anchor-en=\"pcb-design-process-step-by-step\">PCB design process step by step\u003C/h2>\n\u003Cp>The table below is the core of this guide. Each row is a stage of the PCB design workflow, the decision you make there, the manufacturing constraint to check before you commit, and the deliverable that should exist when the stage is done.\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Stage\u003C/th>\n\u003Cth>Decision you make\u003C/th>\n\u003Cth>Manufacturing constraint to check first\u003C/th>\n\u003Cth>Deliverable at the end\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>1. Requirements\u003C/td>\n\u003Ctd>Interfaces, power budget, operating environment, enclosure, quantity\u003C/td>\n\u003Ctd>Board class (for example IPC Class 2 or 3), target volume, assembly route\u003C/td>\n\u003Ctd>Written requirement list and mechanical envelope\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>2. Schematic capture\u003C/td>\n\u003Ctd>Circuit, part choice, net names, reference designators\u003C/td>\n\u003Ctd>Part availability and package types the assembler can place\u003C/td>\n\u003Ctd>Reviewed schematic and a first BOM\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>3. Footprints and libraries\u003C/td>\n\u003Ctd>Land patterns and 3D models for every part\u003C/td>\n\u003Ctd>Pad geometry suited to reflow or wave soldering; paste and mask openings\u003C/td>\n\u003Ctd>Verified footprint library\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>4. Outline and mechanical\u003C/td>\n\u003Ctd>Board shape, mounting holes, connector positions, keep-outs\u003C/td>\n\u003Ctd>Edge clearance, panel method (V-score or tab routing), tooling holes\u003C/td>\n\u003Ctd>Board outline and mechanical DXF/STEP agreed with the enclosure\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>5. Stackup and layer count\u003C/td>\n\u003Ctd>Copper layers, dielectric thickness, copper weights, impedance targets\u003C/td>\n\u003Ctd>Materials in stock, buildable dielectric pairs, finished thickness tolerance\u003C/td>\n\u003Ctd>Stackup proposal confirmed by the fabricator\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>6. Placement\u003C/td>\n\u003Ctd>Component positions and orientation\u003C/td>\n\u003Ctd>Assembly clearances, fiducials, test access, heavy or tall parts, thermal balance\u003C/td>\n\u003Ctd>Placement frozen and reviewed\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>7. Routing\u003C/td>\n\u003Ctd>Traces, vias, planes, length and impedance constraints\u003C/td>\n\u003Ctd>Minimum trace/space and drill for the chosen factory and copper weight\u003C/td>\n\u003Ctd>Fully routed layout with clean DRC\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>8. Verification\u003C/td>\n\u003Ctd>DRC, ERC, SI/PI checks, design review\u003C/td>\n\u003Ctd>Manufacturer DFM review of generated outputs\u003C/td>\n\u003Ctd>Closed review list and approved exceptions\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>9. Release\u003C/td>\n\u003Ctd>File set, drawings, revision control\u003C/td>\n\u003Ctd>Complete fabrication and assembly package with a manifest\u003C/td>\n\u003Ctd>Released package ready to quote\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Cp>You can loop back, and most designs do. The rule is that each loop should go back to the stage that owns the problem. A trace that cannot fit between two pins is usually a placement or stackup problem, not a routing problem.\u003C/p>\n\u003Ch2 id=\"how-to-choose-layer-count-and-stackup\" data-anchor-en=\"how-to-choose-layer-count-and-stackup\">How to choose layer count and stackup\u003C/h2>\n\u003Cp>Layer count is one of the largest cost and lead-time drivers in PCB design, so decide it with evidence:\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cstrong>Package escape.\u003C/strong> Count the rows of BGA balls you must route out. Each inner signal layer escapes a limited number of rows at a given via size and pitch.\u003C/li>\n\u003Cli>\u003Cstrong>Reference planes.\u003C/strong> Fast edges and controlled-impedance lines need a continuous reference plane next to them. A four-layer board with signal, ground, power, signal is a common starting point.\u003C/li>\n\u003Cli>\u003Cstrong>Power distribution.\u003C/strong> Multiple supply rails may justify extra plane layers, or split planes on one layer if the currents and noise allow it.\u003C/li>\n\u003Cli>\u003Cstrong>Isolation.\u003C/strong> Analog, RF, and high-current sections may need dedicated layers or extra spacing.\u003C/li>\n\u003C/ul>\n\u003Cp>Once the count is chosen, the stackup defines dielectric thicknesses, copper weights, and which layers act as references. Agree it with the fabricator before routing impedance-controlled nets, because the trace widths depend on it. The \u003Ca href=\"/en/blog/pcb-stackup-design\">PCB stackup design guide\u003C/a> explains reference planning, and the \u003Ca href=\"/en/tools/impedance-calculator\">impedance calculator\u003C/a> gives first-pass trace geometry.\u003C/p>\n\u003Cp>Some quick reference points for common choices:\u003C/p>\n\u003Ctable>\n\u003Cthead>\n\u003Ctr>\n\u003Cth>Layer count\u003C/th>\n\u003Cth>Typical use\u003C/th>\n\u003Cth>Stackup note\u003C/th>\n\u003C/tr>\n\u003C/thead>\n\u003Ctbody>\u003Ctr>\n\u003Ctd>2\u003C/td>\n\u003Ctd>Simple controls, power, low-speed I/O\u003C/td>\n\u003Ctd>Hard to keep a solid reference plane under every signal\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>4\u003C/td>\n\u003Ctd>Microcontroller boards, mixed-signal, moderate speed\u003C/td>\n\u003Ctd>Signal / ground / power / signal is a common arrangement\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>6\u003C/td>\n\u003Ctd>Fast interfaces, more power rails, denser BGA escape\u003C/td>\n\u003Ctd>Allows two inner signal layers between planes\u003C/td>\n\u003C/tr>\n\u003Ctr>\n\u003Ctd>8 and above\u003C/td>\n\u003Ctd>Large BGAs, many high-speed links, backplanes\u003C/td>\n\u003Ctd>Plan reference layers for every signal layer\u003C/td>\n\u003C/tr>\n\u003C/tbody>\u003C/table>\n\u003Ch2 id=\"placement-rules-for-assembly\" data-anchor-en=\"placement-rules-for-assembly\">Placement rules for assembly\u003C/h2>\n\u003Cp>Placement decides most of what routing can achieve and almost everything about assembly yield. Keep these rules in view:\u003C/p>\n\u003Col>\n\u003Cli>\u003Cstrong>Mechanical first.\u003C/strong> Lock connectors, switches, mounting holes, and anything that must align with the enclosure.\u003C/li>\n\u003Cli>\u003Cstrong>Group by function.\u003C/strong> Keep each power stage, clock, RF section, and sensitive analog block compact, with its decoupling and support parts close to the IC pins.\u003C/li>\n\u003Cli>\u003Cstrong>Keep orientation consistent.\u003C/strong> Aligned polarized parts reduce placement and inspection errors. Mark polarity clearly on silkscreen.\u003C/li>\n\u003Cli>\u003Cstrong>Respect clearances.\u003C/strong> Leave space for nozzle access, rework, inspection, and solder fillets. Keep tall parts away from fine-pitch parts that need visual or AOI inspection.\u003C/li>\n\u003Cli>\u003Cstrong>Plan fiducials and tooling.\u003C/strong> Global fiducials on the board or panel help machine alignment. Local fiducials help fine-pitch packages.\u003C/li>\n\u003Cli>\u003Cstrong>Think about the second side.\u003C/strong> If parts go on both sides, keep heavy parts on the top side and confirm which bottom-side parts can survive a second reflow.\u003C/li>\n\u003Cli>\u003Cstrong>Provide test access.\u003C/strong> Decide early whether the board will see flying probe, ICT, or functional test, and place test points accordingly.\u003C/li>\n\u003C/ol>\n\u003Cp>The \u003Ca href=\"/en/blog/design-for-assembly-checklist\">design for assembly checklist\u003C/a> goes deeper into each of these.\u003C/p>\n\u003Ch2 id=\"routing-a-pcb-layout\" data-anchor-en=\"routing-a-pcb-layout\">Routing a PCB layout\u003C/h2>\n\u003Cp>Route in priority order: critical nets first (clocks, high-speed pairs, sensitive analog, high-current paths), then the remaining signals, then pours and stitching.\u003C/p>\n\u003Cul>\n\u003Cli>Set width, spacing, and via rules per net class. High-current nets need width from a current and temperature-rise calculation. Impedance-controlled nets need geometry from the confirmed stackup.\u003C/li>\n\u003Cli>Keep return paths continuous. Avoid routing fast signals across plane splits or gaps.\u003C/li>\n\u003Cli>Use the smallest number of via types that solves the problem. Each added type (blind, buried, microvia, filled via-in-pad) adds process steps and cost.\u003C/li>\n\u003Cli>Balance copper across layers where you can; heavy imbalance can increase warpage.\u003C/li>\n\u003Cli>Leave the routing in a state the fabricator can verify: no unconnected copper islands unless intended, no acid traps, no slivers in pours.\u003C/li>\n\u003C/ul>\n\u003Cp>For fast interfaces, the \u003Ca href=\"/en/blog/high-speed-pcb-design\">high-speed PCB design guide\u003C/a> covers impedance, length matching, and crosstalk in more depth.\u003C/p>\n\u003Ch2 id=\"dfm-checks-before-release\" data-anchor-en=\"dfm-checks-before-release\">DFM checks before release\u003C/h2>\n\u003Cp>Design rule checks prove that the layout follows the rules you configured. They do not prove those rules match the factory, so run a design-for-manufacturing review as well. Check at least:\u003C/p>\n\u003Cul>\n\u003Cli>Minimum trace, space, and annular ring against the factory's normal capability, not its absolute limit\u003C/li>\n\u003Cli>Drill sizes, aspect ratio, and hole-to-copper clearance\u003C/li>\n\u003Cli>Solder mask openings, mask webs between fine-pitch pads, and via tenting or plugging\u003C/li>\n\u003Cli>Copper to board edge clearance, especially near V-score lines\u003C/li>\n\u003Cli>Silkscreen clear of pads and readable after assembly\u003C/li>\n\u003Cli>Panelization, breakaway tabs, and fiducials if you deliver panels\u003C/li>\n\u003Cli>Footprints matched to the actual parts in the BOM\u003C/li>\n\u003C/ul>\n\u003Cp>The \u003Ca href=\"/en/blog/pcb-design-review-checklist\">PCB design review checklist\u003C/a> is a usable template, and the \u003Ca href=\"/en/blog/pcb-design-for-manufacturing-dfm-guide\">design for manufacturing guide\u003C/a> explains how fabrication, assembly, and test reviews fit together.\u003C/p>\n\u003Ch2 id=\"files-for-a-pcb-quote\" data-anchor-en=\"files-for-a-pcb-quote\">Files for a PCB quote\u003C/h2>\n\u003Cp>The last step of the PCB design process is the release. A complete package lets the manufacturer quote without guessing and build without engineering holds.\u003C/p>\n\u003Cp>\u003Cstrong>Fabrication files\u003C/strong>\u003C/p>\n\u003Cul>\n\u003Cli>Gerber RS-274X or Gerber X2 for every copper, mask, paste, silkscreen, and outline layer, or ODB++ / IPC-2581 as an alternative\u003C/li>\n\u003Cli>NC drill files (Excellon) with plated and non-plated holes separated, plus a drill map\u003C/li>\n\u003Cli>Stackup with layer order, materials, copper weights, dielectric thicknesses, and finished thickness\u003C/li>\n\u003Cli>Fabrication drawing: board dimensions, tolerances, material, finish, mask and silkscreen colors, impedance table, and acceptance class\u003C/li>\n\u003Cli>IPC-D-356 netlist for electrical test comparison\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Assembly files\u003C/strong>\u003C/p>\n\u003Cul>\n\u003Cli>BOM with manufacturer part numbers, reference designators, and quantities\u003C/li>\n\u003Cli>Placement (centroid / pick-and-place) file with X, Y, rotation, and side\u003C/li>\n\u003Cli>Assembly drawing with polarity marks, special instructions, and do-not-place parts\u003C/li>\n\u003Cli>Test requirements if the supplier will run programming or functional test\u003C/li>\n\u003C/ul>\n\u003Cp>\u003Cstrong>Release checklist before you send it\u003C/strong>\u003C/p>\n\u003Cul>\n\u003Cli>\u003Cinput disabled=\"\" type=\"checkbox\"> All files come from the same design revision and carry the same revision code\u003C/li>\n\u003Cli>\u003Cinput disabled=\"\" type=\"checkbox\"> Gerbers were checked in a viewer, not only exported\u003C/li>\n\u003Cli>\u003Cinput disabled=\"\" type=\"checkbox\"> Drill file units and format match the Gerbers\u003C/li>\n\u003Cli>\u003Cinput disabled=\"\" type=\"checkbox\"> Stackup and impedance table agree with the fabrication drawing\u003C/li>\n\u003Cli>\u003Cinput disabled=\"\" type=\"checkbox\"> BOM reference designators match the placement file\u003C/li>\n\u003Cli>\u003Cinput disabled=\"\" type=\"checkbox\"> Open DFM questions are closed or listed as approved exceptions\u003C/li>\n\u003Cli>\u003Cinput disabled=\"\" type=\"checkbox\"> A short readme lists every file and its purpose\u003C/li>\n\u003C/ul>\n\u003Cp>You can preview your outputs with the \u003Ca href=\"/en/tools/gerber-viewer\">online Gerber viewer\u003C/a> before uploading them.\u003C/p>\n\u003Ch2 id=\"why-involve-aptpcb-before-you-release\" data-anchor-en=\"why-involve-aptpcb-before-you-release\">Why involve APTPCB before you release?\u003C/h2>\n\u003Cp>APTPCB's engineers can review a layout before or after routing, confirm whether the proposed stackup is buildable with stocked materials, and check the generated outputs against the fabrication and assembly route you plan to use. For prototypes on a tight schedule, \u003Ca href=\"/en/pcb/quick-turn-pcb\">quick turn PCB fabrication\u003C/a> starts from that reviewed package. Incomplete data is the most common reason a quick-turn order loses days.\u003C/p>\n\u003Cp>The review covers manufacturability. Electrical validation, EMC, thermal performance, firmware, and product certification remain with the design owner.\u003C/p>\n\u003Cp>Relevant standards and references may include:\u003C/p>\n\u003Cul>\n\u003Cli>IPC-2221 and IPC-2222: generic and rigid printed board design\u003C/li>\n\u003Cli>IPC-7351: land pattern design for surface mount components\u003C/li>\n\u003Cli>IPC-2581: data transfer format for board and assembly data\u003C/li>\n\u003Cli>IPC-6012: qualification and performance of rigid printed boards\u003C/li>\n\u003Cli>IPC-A-610: acceptability of electronic assemblies\u003C/li>\n\u003C/ul>\n\u003C!-- faq:start -->\n\u003Ch2 id=\"frequently-asked-questions\" data-anchor-en=\"frequently-asked-questions\">Frequently asked questions\u003C/h2>\n\u003Ch3 id=\"what-are-the-steps-of-pcb-design\" data-anchor-en=\"what-are-the-steps-of-pcb-design\">What are the steps of PCB design?\u003C/h3>\n\u003Cp>The usual steps are requirements, schematic capture, footprint creation, board outline and mechanical definition, stackup selection, component placement, routing, verification (DRC, DFM, design review), and release of fabrication and assembly files. Each step should be stable before the next one depends on it.\u003C/p>\n\u003Ch3 id=\"how-long-does-it-take-to-design-a-pcb\" data-anchor-en=\"how-long-does-it-take-to-design-a-pcb\">How long does it take to design a PCB?\u003C/h3>\n\u003Cp>It depends on complexity. A small two-layer board can be laid out in days, while a dense multilayer board with BGAs and high-speed interfaces can take weeks, plus review cycles. Freezing requirements and placement early shortens the schedule more than faster routing does.\u003C/p>\n\u003Ch3 id=\"what-is-the-difference-between-pcb-design-and-pcb-layout\" data-anchor-en=\"what-is-the-difference-between-pcb-design-and-pcb-layout\">What is the difference between PCB design and PCB layout?\u003C/h3>\n\u003Cp>PCB design often refers to the whole job, from schematic to released files. PCB layout is the physical part of that job: placement, routing, planes, and copper geometry. Many teams use the terms interchangeably.\u003C/p>\n\u003Ch3 id=\"which-software-is-used-for-pcb-design\" data-anchor-en=\"which-software-is-used-for-pcb-design\">Which software is used for PCB design?\u003C/h3>\n\u003Cp>Common tools include Altium Designer, Cadence Allegro and OrCAD, Siemens Xpedition and PADS, and KiCad. Any of them can produce a manufacturable board if the design rules match the fabricator and the outputs are checked before release.\u003C/p>\n\u003Ch3 id=\"what-files-does-a-manufacturer-need-from-a-pcb-design\" data-anchor-en=\"what-files-does-a-manufacturer-need-from-a-pcb-design\">What files does a manufacturer need from a PCB design?\u003C/h3>\n\u003Cp>A fabricator needs Gerber or ODB++/IPC-2581 data, NC drill files, a stackup, a fabrication drawing, and ideally an IPC-D-356 netlist. An assembler also needs a BOM, a placement file, and an assembly drawing. All files should share one revision.\u003C/p>\n\u003Ch3 id=\"when-should-i-ask-the-manufacturer-to-review-my-pcb-design\" data-anchor-en=\"when-should-i-ask-the-manufacturer-to-review-my-pcb-design\">When should I ask the manufacturer to review my PCB design?\u003C/h3>\n\u003Cp>Ask before routing if the board uses controlled impedance, HDI, rigid-flex, heavy copper, or unusual materials, so the stackup and rules are confirmed early. Ask again after outputs are generated to catch export and documentation errors.\u003C/p>\n\u003C!-- faq:end -->\n\n\u003Cdiv data-component=\"BlogQuickQuoteInline\">\u003C/div>\n\n\u003Ch2 id=\"design-in-the-order-the-factory-builds\" data-anchor-en=\"design-in-the-order-the-factory-builds\">Design in the order the factory builds\u003C/h2>\n\u003Cp>A PCB design succeeds when each decision is made at the right stage and checked against the process that will build it. Fix the outline, stackup, and placement before detailed routing, load real manufacturing rules, verify the generated outputs, and release a single consistent package. That is the shortest path from schematic to a board that works on the first build.\u003C/p>\n\n\u003Csection class=\"related-links\" aria-label=\"Related\">\u003Ch3>Related links\u003C/h3>\u003Cul>\u003Cli>\u003Ca href=\"/en/blog/dfm-guidelines-for-pcb-layout\">PCB layout DFM guidelines\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/pcb-stackup-design\">PCB stackup design guide\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/tools/impedance-calculator\">impedance calculator\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/design-for-assembly-checklist\">design for assembly checklist\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/high-speed-pcb-design\">high-speed PCB design guide\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/pcb-design-review-checklist\">PCB design review checklist\u003C/a>\u003C/li>\u003Cli>\u003Ca href=\"/en/blog/pcb-design-for-manufacturing-dfm-guide\">design for manufacturing guide\u003C/a>\u003C/li>\u003C/ul>\u003C/section>",[14,15,16,17,18,19,20],"PCB Design","Circuit Board Design","PCB Layout","PCB Design Process","PCB Stackup","Design for Manufacturing","Gerber Release","pcb-design-guide",{"blog":23,"breadcrumb":32,"faq":46},{"@context":24,"@type":25,"headline":4,"description":5,"image":8,"url":26,"datePublished":6,"dateModified":6,"timeRequired":11,"keywords":27,"articleSection":7,"author":28,"publisher":31},"https://schema.org","BlogPosting","https://aptpcb.com/en/blog/pcb-design-guide","PCB Design, Circuit Board Design, PCB Layout, PCB Design Process, PCB Stackup, Design for Manufacturing, Gerber Release",{"@type":29,"name":30},"Organization","APTPCB",{"@type":29,"name":30},{"@context":24,"@type":33,"itemListElement":34},"BreadcrumbList",[35,40,44],{"@type":36,"position":37,"name":38,"item":39},"ListItem",1,"Home","https://aptpcb.com/",{"@type":36,"position":41,"name":42,"item":43},2,"Blog","https://aptpcb.com/en/blog",{"@type":36,"position":45,"name":21,"item":26},3,{"@context":24,"@type":47,"mainEntity":48},"FAQPage",[49,55,59,63,67,71],{"@type":50,"name":51,"acceptedAnswer":52},"Question","What are the steps of PCB design?",{"@type":53,"text":54},"Answer","The usual steps are requirements, schematic capture, footprint creation, board outline and mechanical definition, stackup selection, component placement, routing, verification (DRC, DFM, design review), and release of fabrication and assembly files. Each step should be stable before the next one depends on it.",{"@type":50,"name":56,"acceptedAnswer":57},"How long does it take to design a PCB?",{"@type":53,"text":58},"It depends on complexity. A small two-layer board can be laid out in days, while a dense multilayer board with BGAs and high-speed interfaces can take weeks, plus review cycles. Freezing requirements and placement early shortens the schedule more than faster routing does.",{"@type":50,"name":60,"acceptedAnswer":61},"What is the difference between PCB design and PCB layout?",{"@type":53,"text":62},"PCB design often refers to the whole job, from schematic to released files. PCB layout is the physical part of that job: placement, routing, planes, and copper geometry. Many teams use the terms interchangeably.",{"@type":50,"name":64,"acceptedAnswer":65},"Which software is used for PCB design?",{"@type":53,"text":66},"Common tools include Altium Designer, Cadence Allegro and OrCAD, Siemens Xpedition and PADS, and KiCad. Any of them can produce a manufacturable board if the design rules match the fabricator and the outputs are checked before release.",{"@type":50,"name":68,"acceptedAnswer":69},"What files does a manufacturer need from a PCB design?",{"@type":53,"text":70},"A fabricator needs Gerber or ODB++/IPC-2581 data, NC drill files, a stackup, a fabrication drawing, and ideally an IPC-D-356 netlist. An assembler also needs a BOM, a placement file, and an assembly drawing. All files should share one revision.",{"@type":50,"name":72,"acceptedAnswer":73},"When should I ask the manufacturer to review my PCB design?",{"@type":53,"text":74},"Ask before routing if the board uses controlled impedance, HDI, rigid-flex, heavy copper, or unusual materials, so the stackup and rules are confirmed early. Ask again after outputs are generated to catch export and documentation errors.",{"pcbManufacturingColumns":76,"capabilityColumns":201,"resourceColumns":232,"pcbaColumns":273},[77,125,154,183],{"heading":78,"links":79},"PCB Product Families",[80,83,86,89,92,95,98,101,104,107,110,113,116,119,122],{"label":81,"path":82},"FR-4 PCB","/pcb/fr4-pcb",{"label":84,"path":85},"High-Speed PCB","/pcb/high-speed-pcb",{"label":87,"path":88},"Multilayer PCB","/pcb/multilayer-pcb",{"label":90,"path":91},"HDI PCB","/pcb/hdi-pcb",{"label":93,"path":94},"Flexible PCB","/pcb/flex-pcb",{"label":96,"path":97},"Rigid Flex PCB","/pcb/rigid-flex-pcb",{"label":99,"path":100},"Ceramic PCB","/pcb/ceramic-pcb",{"label":102,"path":103},"Heavy Copper PCB","/pcb/heavy-copper-pcb",{"label":105,"path":106},"High Thermal PCB","/pcb/high-thermal-pcb",{"label":108,"path":109},"Antenna PCB","/pcb/antenna-pcb",{"label":111,"path":112},"High Frequency PCB","/pcb/high-frequency-pcb",{"label":114,"path":115},"Microwave PCB","/pcb/microwave-pcb",{"label":117,"path":118},"Metal Core PCB","/pcb/metal-core-pcb",{"label":120,"path":121},"High-Tg PCB","/pcb/high-tg-pcb",{"label":123,"path":124},"Backplane PCB","/pcb/backplane-pcb",{"sections":126},[127],{"heading":128,"links":129},"RF & Materials",[130,133,136,139,142,145,148,151],{"label":131,"path":132},"Rogers PCB","/materials/rf-rogers",{"label":134,"path":135},"Taconic PCB","/materials/taconic-pcb",{"label":137,"path":138},"Teflon PCB","/materials/teflon-pcb",{"label":140,"path":141},"Arlon PCB","/materials/arlon-pcb",{"label":143,"path":144},"Megtron PCB","/materials/megtron-pcb",{"label":146,"path":147},"ISOLA PCB","/materials/isola-pcb",{"label":149,"path":150},"Spread Glass FR-4","/materials/spread-glass-fr4",{"label":152,"path":153},"Impedance Control","/pcb/pcb-impedance-control",{"sections":155},[156],{"heading":157,"links":158},"Manufacturing / Stackups",[159,162,165,168,171,174,177,180],{"label":160,"path":161},"Quickturn Prototypes","/pcb/quick-turn-pcb",{"label":163,"path":164},"NPI & Small Batch (PCB)","/pcb/npi-small-batch-pcb-manufacturing",{"label":166,"path":167},"High-Volume Production","/pcb/mass-production-pcb-manufacturing",{"label":169,"path":170},"High Layer Count PCB","/pcb/high-layer-count-pcb",{"label":172,"path":173},"PCB Fabrication Process","/pcb/pcb-fabrication-process",{"label":175,"path":176},"Advanced PCB Manufacturing","/pcb/advanced-pcb-manufacturing",{"label":178,"path":179},"Special PCB Manufacturing","/pcb/special-pcb-manufacturing",{"label":181,"path":182},"Multi-Layer Laminated Structure","/pcb/multilayer-pcb-lamination-services",{"heading":184,"links":185},"Specialties & Resources",[186,189,192,195,198],{"label":187,"path":188},"PCB Surface Finishes (ENIG / ENEPIG / HASL / OSP / Immersion)","/pcb/pcb-surface-finishes",{"label":190,"path":191},"Drilling & Vias (Blind / Buried / Via-in-Pad / Backdrill / Half Hole)","/pcb/pcb-drilling",{"label":193,"path":194},"PCB Stackup (Standard / High-Layer / Flex / Rigid-Flex / Aluminum)","/pcb/pcb-stack-up",{"label":196,"path":197},"Profiles (Milling / V-Scoring / Depaneling)","/pcb/pcb-profiling",{"label":199,"path":200},"Quality & Inspection (AOI + X-Ray / Flying Probe / PCB DFM Check)","/pcb/pcb-quality",[202,207,212,217,222,227],{"links":203},[204],{"label":205,"path":206},"Rigid PCB Capability","/capabilities/rigid-pcb",{"links":208},[209],{"label":210,"path":211},"Rigid-Flex Capability","/capabilities/rigid-flex-pcb",{"links":213},[214],{"label":215,"path":216},"Flex PCB Capability","/capabilities/flex-pcb",{"links":218},[219],{"label":220,"path":221},"HDI PCB Capability","/capabilities/hdi-pcb",{"links":223},[224],{"label":225,"path":226},"Metal PCB Capability","/capabilities/metal-pcb",{"links":228},[229],{"label":230,"path":231},"Ceramic PCB Capability","/capabilities/ceramic-pcb",[233,244,265],{"heading":234,"links":235},"Downloads",[236,239,242],{"label":237,"path":238},"Materials Datasheet / Processing Notes","/resources/downloads-materials",{"label":240,"path":241},"PCB DFM Guidelines","/resources/dfm-guidelines",{"label":181,"path":243},"/pcb/multi-layer-laminated-structure",{"heading":245,"links":246},"Tools",[247,250,253,256,259,262],{"label":248,"path":249},"Gerber Viewer","/tools/gerber-viewer",{"label":251,"path":252},"PCB Viewer","/tools/pcb-viewer",{"label":254,"path":255},"BOM Viewer","/tools/bom-viewer",{"label":257,"path":258},"3D Viewer","/tools/3d-viewer",{"label":260,"path":261},"Circuit Simulator","/tools/circuit-simulator",{"label":263,"path":264},"Impedance Calculator","/tools/impedance-calculator",{"heading":266,"links":267},"FAQ & Blog",[268,271],{"label":269,"path":270},"FAQ","/resources/faq",{"label":42,"path":272},"/blog",[274,304,328,361],{"heading":275,"links":276},"Core Services",[277,280,283,286,289,292,295,298,301],{"label":278,"path":279},"Turnkey PCB Assembly","/pcba/turnkey-assembly",{"label":281,"path":282},"NPI & Small Batch PCB Assembly","/pcba/npi-assembly",{"label":284,"path":285},"Mass Production PCB Assembly","/pcba/mass-production",{"label":287,"path":288},"Flex & Rigid-Flex PCB Assembly","/pcba/flex-rigid-flex",{"label":290,"path":291},"SMT & Through-Hole Assembly","/pcba/smt-tht",{"label":293,"path":294},"BGA PCB Assembly","/pcba/bga-qfn-fine-pitch",{"label":296,"path":297},"Components & BOM Management","/pcba/components-bom",{"label":299,"path":300},"Box Build Assembly","/pcba/box-build-assembly",{"label":302,"path":303},"PCB Assembly Testing & Quality","/pcba/testing-quality",{"heading":305,"links":306},"Supporting Services",[307,310,313,316,319,322,325],{"label":308,"path":309},"Every Support Touchpoint","/pcba/support-services",{"label":311,"path":312},"Stencil Lab","/pcba/pcb-stencil",{"label":314,"path":315},"Components Sourcing","/pcba/component-sourcing",{"label":317,"path":318},"IC Programming","/pcba/ic-programming",{"label":320,"path":321},"Conformal Coating","/pcba/pcb-conformal-coating",{"label":323,"path":324},"Selective Soldering","/pcba/pcb-selective-soldering",{"label":326,"path":327},"BGA Reballing","/pcba/bga-reballing",{"heading":329,"links":330},"Quality & Testing",[331,334,337,340,343,346,349,352,355,358],{"label":332,"path":333},"Quality Inspection","/pcba/quality-system",{"label":335,"path":336},"First Article Inspection (FAI)","/pcba/first-article-inspection",{"label":338,"path":339},"Solder Paste Inspection (SPI)","/pcba/spi-inspection",{"label":341,"path":342},"AOI Optical Inspection","/pcba/aoi-inspection",{"label":344,"path":345},"X-Ray / CT Inspection","/pcba/xray-inspection",{"label":347,"path":348},"ICT In-Circuit Testing","/pcba/ict-test",{"label":350,"path":351},"Flying Probe Testing","/pcba/flying-probe-testing",{"label":353,"path":354},"FCT / Functional Testing","/pcba/fct-test",{"label":356,"path":357},"Final Inspection & Packing","/pcba/final-quality-inspection",{"label":359,"path":360},"Incoming Quality Control","/pcba/incoming-quality-control",{"heading":362,"linkClass":363,"links":364},"Industry Applications (Entry)","text-nowrap",[365,368,371,374,377,380,383,386,389,392,395],{"label":366,"path":367},"Server / Data Center","/industries/server-data-center-pcb",{"label":369,"path":370},"Automotive / EV","/industries/automotive-electronics-pcb",{"label":372,"path":373},"Medical","/industries/medical-pcb",{"label":375,"path":376},"Telecom / 5G","/industries/communication-equipment-pcb",{"label":378,"path":379},"Aerospace & Defense","/industries/aerospace-defense-pcb",{"label":381,"path":382},"Drone / UAV","/industries/drone-uav-pcb",{"label":384,"path":385},"Industrial Control & Automation","/industries/industrial-control-pcb",{"label":387,"path":388},"Power & New Energy","/industries/power-energy-pcb",{"label":390,"path":391},"Robotics & Automation","/industries/robotics-pcb",{"label":393,"path":394},"Security / Security Equipment","/industries/security-equipment-pcb",{"label":396,"path":397},"PCB Industry Overview →","/pcb-industry-solutions",1791013406190]