A PCB design for assembly checklist is a release gate that confirms the board, BOM, placement, drawings, process route, inspection and test plan describe the same manufacturable product. It should find mismatches before stencils, fixtures and components are committed—not become a cosmetic review after Gerbers are exported.
Key takeaways
- Validate every footprint against the exact approved manufacturer part, not a generic package name.
- Make polarity and pin-1 orientation machine-readable and visible in the assembly drawing.
- Review solder-joint access, thermal balance and inspection method by package and process.
- Freeze SMT, THT, press-fit, selective/wave, hand-solder and mechanical operations as one sequence.
- Design test access and programming before dense placement removes fixture options.
- Release synchronized fabrication, assembly, BOM and software/test revisions.
1. Freeze the component and footprint library
| Check | Pass condition |
|---|---|
| Manufacturer part number | Exact orderable part and package are approved |
| Land pattern | Datasheet dimensions, tolerance and assembly process reviewed |
| Pin mapping | Schematic symbol, footprint and datasheet agree |
| Courtyard | Placement and rework clearance reflect the real body |
| 3D/mechanical body | Height, connector engagement and enclosure fit are correct |
| Thermal pad | Paste segmentation, vias and voiding target are defined |
| Variant/DNI handling | Population options are explicit and non-ambiguous |
| Alternate part | Footprint, electrical, thermal and lifecycle fit are approved |
IPC-7351 can support land-pattern design, but the component maker's current package drawing and the actual soldering process remain controlling inputs.
2. Make orientation and polarity unambiguous
- Use a consistent pin-1 convention in the centroid, assembly drawing and silkscreen.
- Mark diode, LED, electrolytic capacitor, tantalum capacitor and other polarized parts clearly.
- Verify connector keying, mating direction and cable exit.
- Do not place polarity marks under the assembled body only.
- Keep reference designators readable after assembly where practical.
- Review bottom-side coordinates and rotation using the assembler's convention.
- Add a first-article comparison between design data and actual machine orientation.
Rotation conventions differ among ECAD exports and pick-and-place systems. A controlled visual assembly drawing is the tie-breaker.
3. Check placement spacing and process access
Universal component-spacing numbers are misleading because nozzle, feeder, package height, oven, rework and inspection constraints vary. Ask the assembler to check the actual equipment rules.
Review:
- component-to-component, component-to-edge and component-to-tooling clearance;
- tall parts beside fine-pitch parts or bottom-side components;
- nozzle access and stable pick surfaces;
- rework access around BGA, QFN, LGA and shielded modules;
- connector insertion and removal force;
- screw, heat sink, clamp and chassis keep-outs;
- depanelization stress near ceramics, BGAs and connectors;
- coating/potting mask areas and drainage;
- fiducials, tooling holes and panel rails.
4. Design solder joints for the real process
| Process/package | DFA review focus |
|---|---|
| Fine-pitch SMT | Mask dams, paste release, coplanarity and bridge risk |
| QFN/LGA/BTC | Thermal-pad paste, via treatment, voiding and X-ray |
| BGA | Escape routing, warpage, paste, X-ray and rework boundary |
| THT/wave | Hole-to-lead fit, orientation, shadowing and solder thieving |
| Selective solder | Nozzle access, keep-outs, thermal mass and pallets |
| Press-fit | Hole specification, support tooling and insertion force |
| Heavy copper/power parts | Heat balance, preheat and joint fill |
| Flex/rigid-flex | Support fixtures, stiffener transitions and handling |
Thermal relief is not automatically right or wrong. Use it where it balances electrical, thermal and soldering requirements; document exceptions such as high-current or heat-spreading joints.
5. Plan inspection before release
AOI can inspect visible features but cannot see every hidden joint. X-ray may reveal voids, shorts or insufficient solder, but acceptance limits must match package and product risk.
| Feature | Suitable evidence |
|---|---|
| Paste deposits | SPI |
| Visible polarity, placement and joints | AOI/visual inspection |
| BGA/QFN/LGA hidden joints | X-ray plus process controls |
| THT barrel fill and wetting | Visual/X-ray or microsection as specified |
| Press-fit connection | Insertion-force record and inspection |
| Coating coverage | UV/visual inspection and mask check |
Define accept/reject criteria before first build. “Inspect per IPC” is incomplete unless the product class, standard revision and contractual exceptions are stated.
6. Preserve test, programming and calibration access
- Provide accessible test pads for power rails, grounds, programming and critical nets.
- Keep probe pads away from solder-mask edges and unstable board areas.
- Define probe side, fixture datum and keep-outs.
- Add isolation or protection so a fixture fault does not damage the unit.
- Decide whether boundary scan, ICT, flying probe or functional test is appropriate.
- Include connectors, loads, sensor simulation and firmware test mode in the plan.
- Identify calibration references, environmental conditions and stored data.
- Link firmware and test-program revisions to the PCBA revision.
Design for test is not a substitute for DFA, but a board that cannot be tested repeatably is not ready for repeatable assembly.
7. Review panelization and mechanical handling
Panel design affects stencil printing, placement, reflow, inspection, test and depanelization. Confirm panel rails, fiducials, tooling holes, support, breakaway method, copper balance and sensitive-component distance from routed or scored edges.
Do not finalize mouse bites or V-scores without the assembler and fabricator. Board outline, thickness, component overhang and depanelization force determine the suitable method.
8. Synchronize the release package
The RFQ and release package should include:
- Gerber X2, ODB++ or IPC-2581 and fabrication drawing;
- netlist, drill, profile and controlled stack-up;
- approved BOM with manufacturer part numbers and alternates;
- centroid/pick-and-place file with coordinate convention;
- assembly drawing, polarity, variants and DNI list;
- stencil and special paste requirements;
- panel drawing or panel constraints;
- soldering, cleaning, coating and mechanical instructions;
- programming, calibration and functional-test procedure;
- acceptance class, inspection criteria and traceability;
- synchronized revision identifiers on every file.
One archived release package should be the source of truth. Email changes to a BOM or drawing after release create configuration risk.
Common DFA failures
| Failure | Consequence | Prevention |
|---|---|---|
| Generic footprint used for an alternate | Misalignment or bad joints | Validate exact package drawing |
| Conflicting rotation data | Reversed or rotated placement | Controlled assembly drawing and FAI |
| THT part blocks selective-solder nozzle | Manual rework and variable quality | Review process sequence and keep-outs |
| Test pads hidden by parts/coating | Incomplete production test | Fixture review before placement freeze |
| BGA placed near breakaway edge | Depanelization strain | Move component or change panel method |
| Uncontrolled DNI/variant | Wrong population | Machine-readable variant BOM/placement |
| BOM and Gerber revisions differ | Builds wrong product | Single synchronized release archive |
DFA RFQ checklist
- Product use, reliability class and environment
- PCB and assembly quantities, variants and lifecycle
- Complete synchronized fabrication and assembly files
- Exact packages, approved alternates and customer-supplied parts
- SMT/THT/press-fit/mechanical process requirements
- Inspection and hidden-joint acceptance criteria
- Programming, calibration and functional-test scope
- Panel constraints, depanelization and first-article requirements
- Cleaning, coating, potting and packaging
- Traceability, change notification and report retention
Use the DFM guidelines for fabrication checks, then submit the controlled assembly package through the PCB quotation page.
Standards and reference documents
- IPC-7351 — Generic Requirements for Surface Mount Design and Land Pattern Standard
- IPC-2221 — Generic Standard on Printed Board Design
- J-STD-001 — Requirements for Soldered Electrical and Electronic Assemblies
- IPC-A-610 — Acceptability of Electronic Assemblies
- IPC-7093 — Design and Assembly Process Implementation for Bottom Termination Components
- IPC-7095 — Design and Assembly Process Implementation for BGAs
Confirm current revisions, product class and contractual exceptions.
PCB design for assembly FAQ
Is DFA only about component spacing?
No. It covers footprints, orientation, process sequence, solder-joint design, inspection, panelization, test access, documentation and configuration control.
When should DFA review happen?
Perform it before layout freeze, again before files are released for quotation, and after any component, package, board-outline or process change that affects assembly.
Does DFA replace DFM or DFT?
No. DFM addresses fabrication, DFA addresses assembly and DFT addresses testability. A production-ready release needs all three aligned.
Who should approve component alternates?
Engineering should approve electrical, package, thermal, lifecycle and compliance fit. The assembler should not substitute a part solely because it fits the pads.
What is the minimum DFA package for a quote?
At minimum, provide fabrication data, BOM, centroid, assembly drawing, quantities, variants and known inspection/test requirements. Missing inputs should be listed as quote assumptions.
Verify clearance and pad geometry against IPC-A-610 Class 3 requirements for high-reliability assemblies.