CERAMIC PCB SPECIFICATIONS
Ceramic PCB Capabilities: DPC, LTCC and DBC Limits
Fabrication limits APTPCB works to for ceramic PCBs on 96% alumina and AlN: substrate sizes and thicknesses, DPC, LTCC and DBC routes, line and space by copper thickness, laser drilling by board thickness, outline tolerances, finishes and reliability tests. For substrate selection, pricing and quoting, see the ceramic PCB manufacturer page.
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What are the ceramic PCB capabilities at APTPCB?
Ceramic PCBs are built on 96% alumina (20–27 W/m·K) or aluminum nitride (140–180 W/m·K) in 1–2 layers, on standard substrates up to 190 × 140 mm and 0.2–1.5 mm thick. DPC reaches 0.05 mm lines on thin copper and up to 10 oz finished copper; DBC is used for thick bonded copper on power substrates; LTCC is quoted for multilayer RF modules.
Substrate choice, cost drivers and the RFQ checklist are on the ceramic PCB manufacturer page (alumina vs AlN, DPC vs DBC vs LTCC). Assembly background: how to solder on ceramic PCBs.
Ceramic PCB process route limits: DPC, DBC and LTCC
| Limit | DPC (direct plated copper) | DBC (direct bonded copper) | LTCC |
|---|---|---|---|
| Substrates | 96% Al₂O₃, AlN | 96% Al₂O₃, AlN | Co-fired ceramic tape |
| Layers | 1–2 | 1–2 | Multilayer, by review |
| Copper | 0.5–10 oz finished (H/H to 10/10) | Thick bonded foil, by review | Printed conductors |
| Finest line / space | 0.05/0.05 mm at 5–10 µm copper | Wider; set by foil thickness | By review |
| Filled vias | Copper-filled, aspect ratio ≤ 5:1, board ≤ 0.635 mm | Not typical | Co-fired vias |
| Best fit | Fine-line LED, sensor and RF circuits | High-current power module substrates | Multilayer RF modules with buried passives |
Use the main table for numeric tolerances; this table shows which route can reach them.
Ceramic PCB capability table: materials, features, finishes and tests
| Item | Capability Category | Detailed Specification | Notes / Remarks |
|---|---|---|---|
| 1 | Base Ceramic Materials | 96% Alumina (Al2O3) ceramics substrate Aluminum Nitride (AlN) ceramics substrate | Excellent thermal and electrical properties. |
| 2 | Thermal Conductivity | 96% Alumina (Al2O3): 20 - 27 W/m·K Aluminum Nitride (AlN): 140 - 180 W/m·K | Grade-dependent; the datasheet for the quoted grade is the reference. |
| 3 | Ceramic Substrate Size (Max) | Standard: 114x114mm, 120x120mm, 140x130mm, 190x140mm | Custom sizes available upon request. |
| 4 | Material Thickness | 0.2mm, 0.25mm, 0.3mm, 0.38mm, 0.5mm, 0.635mm, 0.8mm, 1.0mm, 1.2mm, 1.5mm | Range to meet diverse application needs. |
| 5 | Production Technologies | DPC (Direct Plated Copper): 0.5 - 10 oz LTCC (Low-Temperature Co-fired Ceramic) DBC (Direct Bonded Copper) | Offering comprehensive ceramic manufacturing solutions. |
| 6 | Layers | 1 Layer, 2 Layers | Single and double-sided ceramic PCBs. |
| 7 | Copper Weight (Finished) | H/H, 1/1, 2/2, 3/3, 4/4, 5/5, 6/6, 7/7, 8/8, 9/9, 10/10 oz | Achievable with DPC/DBC processes. |
| 8 | Min. Line Width / Spacing (DPC) | For 5-10 µm Cu: 0.05 mm / 0.05 mm (2 / 2 mil) For 18 µm (0.5 oz) Cu: 0.075 mm / 0.075 mm (3 / 3 mil) For 35 µm (1 oz) Cu: 0.1 mm / 0.1 mm (4 / 4 mil) For 70 µm (2 oz) Cu: 0.127 mm / 0.127 mm (5 / 5 mil) For 105 µm (3 oz) Cu: 0.3 mm / 0.3 mm (12 / 12 mil) For 210 µm (6 oz) Cu: 0.5 mm / 0.5 mm (20 / 20 mil) For 300 µm (9 oz) Cu: 0.6 mm / 0.6 mm (24 / 24 mil) | Fine line technology for high-density designs. |
| 9 | Min. Drilling Holes | 0.06 mm (2.4 mil) | High-precision mechanical drilling. |
| 10 | Hole Diameter Tolerance | ±20% (for drilling holes) | |
| 11 | Drilling Shift Angle | ±0.025 mm | Precision in hole alignment. |
| 12 | Slot Holes Tolerance | L ≥ 2XW: long ±0.05mm, wide ±0.025mm L < 2XW: long ±0.025mm, wide ±0.010mm | Precision for various slot hole dimensions. |
| 13 | Laser Drilling Capabilities | 0.1 mm (for 0.25 / 0.38 / 0.5 mm board thickness) 0.15 – 0.2 mm (for 0.635 mm board thickness) 0.2 – 0.35 mm (for 1.0 mm board thickness) 0.4 – 0.5 mm (for 1.5 mm board thickness) 0.5 – 0.6 mm (for 2.0 mm board thickness) | Laser drilling for specific hole requirements based on board thickness. |
| 14 | Min. Hole-to-Hole Spacing | 0.15 mm (center to center) | For densely packed vias/holes. |
| 15 | Copper Plating Filled Via (DPC) | Aspect Ratio ≤ 5:1, Board Thickness ≤ 0.635 mm | For enhanced thermal and electrical performance. |
| 16 | Outer Shape to Copper Distance | 0.15 – 0.2 mm | Critical for outline precision. |
| 17 | Outer Dimensions Tolerance | ≤ ±0.05 mm | High precision for overall board dimensions. |
| 18 | Laser Outline / Cutting | Cutting Line to Line 0.5 mm Residual thickness tolerance: ±0.05 mm Position tolerance: ±0.025 mm Cutting line to cutting line tolerance: ±0.025 mm Laser outline tolerance: ±0.1 mm | Max Laser cutting board thickness ≤3.0mm. Laser scribing depth ≤0.7mm. |
| 19 | Solder Mask Thickness | 10 - 30 µm (line surface) | For precise solder mask application. |
| 20 | Solder Mask Tolerance | ±0.05 mm | For accurate solder mask openings. |
| 21 | Min. Solder Mask Opening (Pad) | 0.15 mm | For fine pitch pads. |
| 22 | Min. Solder Mask Line Width | For 1 oz Cu: 0.05 mm For 2 oz Cu: 0.075 mm For 3 oz Cu: 0.1 mm For 4 oz Cu: 0.125 mm | Specific to copper weight for optimal adhesion and definition. |
| 23 | Silkscreen (Legend) Min. Width | 0.15 mm | For clear and precise component marking. |
| 24 | Silkscreen to Pad Distance | 0.15 mm | Avoiding encroachment on pads. |
| 25 | Min. Silkscreen Diameter | 0.75 mm | For small fiducials or alignment marks. |
| 26 | Min. Silkscreen Gap | 0.15 mm | For definition between silkscreen elements. |
| 27 | Surface Finishes | OSP: 0.2 – 0.5 µm Immersion Silver: ≥0.5 µm Immersion Tin: 0.8 – 1.2 µm Immersion Gold (ENIG): Ni 3-8 µm, Au 0.03-0.3 µm Electroless Nickel Palladium Immersion Gold (ENEPIG): Ni 3-8 µm, Pd 0.05-0.1 µm, Au 0.05-0.1 µm | Comprehensive range of finishes for diverse bonding and assembly methods. |
| 28 | Copper Foil Peel Strength | >2 N/mm (per IPC-TM-650 2.4.8) | Ensuring robust adhesion of copper to ceramic. |
| 29 | Thermal Resistance | 350 ± 10℃, 15 min without delamination or blistering (per IPC-TM-650 2.4.7) | High-temperature reliability for demanding applications. |
| 30 | Solderability | >95% wetting (per IPC-TM-650 2.4.14) | Ensuring reliable solder joint formation. |
| 31 | Bow & Twist | ≤ 0.3 mm (3‰ per 100 mm) | For optimal flatness. |
| 32 | Quality Standards | IPC-A-600 Class 2 / Class 3 | All PCBs manufactured to rigorous industry standards. |
| 33 | Electrical Test | 100% E-test (Flying Probe or Fixture Test) | Comprehensive testing for opens/shorts and continuity. |
Values outside this table, or extreme values in several rows on one design, need engineering review before quotation.
Ceramic PCB DFM rules to check before layout release
| Design rule | Limit | Why it matters on ceramic |
|---|---|---|
| Line / space vs copper (DPC) | 0.075 mm @ 0.5 oz; 0.1 mm @ 1 oz; 0.127 mm @ 2 oz; 0.3 mm @ 3 oz; 0.5 mm @ 6 oz | Thicker plated copper spreads sideways; use the row for the finished copper. |
| Laser hole vs substrate thickness | 0.1 mm (0.25–0.5 mm); 0.15–0.2 mm (0.635 mm); 0.2–0.35 mm (1.0 mm); 0.4–0.5 mm (1.5 mm) | The minimum hole grows with ceramic thickness. |
| Hole-to-hole spacing | ≥ 0.15 mm center to center | Closer holes risk cracks between them. |
| Copper to outline | 0.15–0.2 mm | Laser cutting and snapping need copper-free margin at the edge. |
| Laser outline | ±0.1 mm; scribe depth ≤ 0.7 mm; cut thickness ≤ 3.0 mm | Scribed breaks leave a rougher edge than a full cut. |
| Solder mask line width | 0.05 mm @ 1 oz up to 0.125 mm @ 4 oz | Mask dams between pads widen with copper height. |
| Flatness | ≤ 0.3 mm (3‰ per 100 mm) | Bow affects die attach, printing and heatsink contact. |
Mechanical stress during assembly is the most common cause of ceramic cracking; fixtures and reflow profiles are reviewed with the assembler.
What these ceramic PCB specifications do not cover
The tables describe the bare substrate. Die attach, wire bond pull strength, module thermal resistance and power-cycling life depend on assembly materials and process, and are qualified on the assembled part.
Silicon nitride, AMB and thick-film constructions are not part of this standard table and are quoted after engineering review.
Ceramic PCB capabilities FAQ
What thermal conductivity do alumina and AlN ceramic PCBs have?
96% alumina is 20–27 W/m·K and aluminum nitride is 140–180 W/m·K, depending on grade. AlN is used where alumina cannot move the heat; the datasheet for the quoted grade is the reference.
What is the finest line and space on a ceramic PCB?
0.05/0.05 mm with DPC on 5–10 µm copper. It widens with copper: 0.075 mm at 0.5 oz, 0.1 mm at 1 oz, 0.127 mm at 2 oz and 0.3 mm at 3 oz.
What is the smallest hole on a ceramic PCB?
Mechanical drilling to 0.06 mm. Laser holes start at 0.1 mm on 0.25–0.5 mm substrates and grow with thickness, to 0.4–0.5 mm on 1.5 mm.
What substrate sizes and thicknesses are standard?
Standard substrates are 114 × 114, 120 × 120, 140 × 130 and 190 × 140 mm, in thicknesses from 0.2 to 1.5 mm. Custom sizes are reviewed on request.
Which surface finishes are available on ceramic PCBs?
OSP, immersion silver, immersion tin, ENIG and ENEPIG. ENEPIG and gold finishes are used where wire bonding is required.
Check your ceramic PCB layout against these limits
Send the files with substrate, process route and copper thickness. Engineering confirms which limits apply and returns DFM comments with the quote.