Wire Bonding on Ceramic: Engineering Specs, Process Steps, and Troubleshooting Guide

Quick Answer (30 seconds)

Successful wire bonding on ceramic relies on strict control of surface roughness, metallization purity, and thermal energy management. Unlike organic substrates (FR4), ceramic dissipates heat rapidly, requiring higher stage temperatures and precise ultrasonic energy calibration.

Surface Roughness: Must be Ra < 0.3 µm (ideally < 0.1 µm for thin film) to ensure bond adhesion.
Metallization: ENEPIG or Soft Gold (99.99% purity) with a minimum thickness of 0.1 µm is standard.
Temperature: Stage temperatures typically range from 150°C to 250°C, higher than standard PCB processes.
Cleaning: Plasma cleaning is mandatory to remove organic contaminants before bonding.
Validation: Wire pull tests must meet MIL-STD-883 standards (typically > 3g for 1 mil gold wire).

When wire bonding on ceramic applies (and when it doesn’t)

Understanding the physical constraints of ceramic substrates is the first step in determining process viability.

When to use wire bonding on ceramic:

High-Power Applications: When the device requires efficient heat dissipation (e.g., IGBT modules, power LEDs) that organic PCBs cannot handle.
Hermetic Sealing: For aerospace or medical sensors requiring a vacuum-tight seal where outgassing from organic glues or laminates is unacceptable.
High-Frequency RF: When signal loss must be minimized; ceramic (Alumina or Aluminum Nitride) offers superior dielectric properties compared to standard laminates.
High-Temperature Environments: When the operating environment exceeds 150°C, where traditional solder joints might fatigue or FR4 might delaminate.
Miniaturization: When pitch requirements are below 100 µm, necessitating direct chip-on-board (COB) technology without bulky packages.

When NOT to use it:

Cost-Sensitive Consumer Electronics: If standard SMT assembly on FR4 is sufficient, ceramic adds unnecessary material and processing costs.
Large Format Panels: Ceramic substrates are brittle and prone to warping or cracking in sizes larger than 4x4 inches, making handling difficult.
Flexible Applications: Ceramic has zero flexibility; any mechanical stress or bending will fracture the substrate immediately.
Standard Solderable Components: If the design uses only packaged components (SOIC, QFN) with standard leads, wire bonding adds a redundant and expensive process step.

Rules & specifications

Once the decision to use wire bonding on ceramic is confirmed, the design must adhere to specific manufacturing tolerances. Deviating from these rules is the primary cause of "non-stick on pad" (NSOP) failures.

Rule	Recommended Value/Range	Why it matters	How to verify	If ignored
Surface Roughness (Ra)	< 0.3 µm (Thick Film) < 0.1 µm (Thin Film)	Rough surfaces prevent the capillary from forming a uniform intermetallic compound (IMC).	Profilometer or AFM scan.	Weak bonds, immediate lift-off during testing.
Gold Plating Thickness	0.1 µm – 0.5 µm (Soft Gold)	Gold acts as the deformation layer. Too thin exposes nickel; too thick wastes cost.	X-Ray Fluorescence (XRF).	Too thin: Oxidation/NSOP. Too thick: Cost overrun.
Nickel Barrier Thickness	3.0 µm – 6.0 µm	Prevents copper migration into the gold layer, which poisons the bond.	XRF or Cross-section analysis.	Diffusion leads to bond degradation over time.
Bond Pad Size (Min)	70 µm x 70 µm (for 25µm wire)	Provides margin for placement accuracy and the "squash" of the bond ball.	Optical measurement (AOI).	Bond lands off-pad, causing shorts or open circuits.
Bond Pad Pitch	> 80 µm (Standard) > 60 µm (Fine Pitch)	Prevents capillary interference with adjacent wires or loops.	CAD Design Rule Check (DRC).	Short circuits between adjacent bond wires.
Stage Temperature	150°C – 250°C	Ceramic acts as a heat sink; heat is needed to soften the wire and pad for diffusion.	Thermocouple on clamp surface.	Too low: No bond formation. Too high: Oxidation of leadframe/epoxy.
Ultrasonic Power	60 – 120 mW (Variable)	Provides the scrubbing energy to break oxides and fuse metals.	Transducer calibration tool.	Low: NSOP. High: Cratering (cracking the ceramic under the pad).
Bond Force	15g – 40g (for 1 mil wire)	Ensures intimate contact between wire and pad during ultrasonic scrubbing.	Force gauge calibration.	Low: Weak bond. High: Excessive deformation/heel cracks.
Plasma Cleaning	Argon/Oxygen mix, 2-5 mins	Removes organic residue (epoxy bleed, finger oils) from the gold surface.	Water contact angle test.	High rates of NSOP due to invisible contamination.
Die Attach Adhesive	Low outgassing, Ag-filled	Prevents contamination of bond pads during the curing process.	Shear strength test.	Voids under die, poor thermal transfer, pad contamination.
Wire Loop Height	> 100 µm	Prevents wire from touching the die edge (shorting).	Optical side-view inspection.	Short circuits at the die edge.
Substrate Material	96% Al2O3 or AlN	Determines thermal conductivity and CTE match with the die.	Material datasheet certification.	Thermal mismatch causes die cracking or bond fatigue.

Implementation steps

Executing a reliable wire bonding on ceramic process requires a strict sequence of operations. Each step builds on the previous one, and skipping validation points will result in yield loss at the end of the line.

1. Substrate Preparation and Cleaning

Action: Clean the ceramic substrate using a solvent wash followed by plasma cleaning (Argon or Argon/Oxygen).
Key Parameter: Plasma time (typically 3-5 minutes) and power (300W).
Acceptance Check: Water contact angle < 10 degrees indicates a clean, high-energy surface ready for bonding.

2. Die Attach (Die Bonding)

Action: Dispense adhesive or place solder preform, then place the die onto the ceramic pad.
Key Parameter: Bond line thickness (BLT) control (typically 25-50 µm).
Acceptance Check: Visual inspection for epoxy bleed-out. Bleed-out onto wire bond pads will prevent bonding later. Refer to die attach on ceramic substrates guidelines for specific adhesive selection.

3. Curing / Reflow

Action: Cure the adhesive or reflow the solder.
Key Parameter: Reflow and thermal profile for ceramic must be controlled to prevent thermal shock to the ceramic (ramp rate < 3°C/sec).
Acceptance Check: Die shear test on a sample unit to verify mechanical integrity (> 1 kg force depending on die size).

4. Wire Bonder Setup and Calibration

Action: Install the correct capillary and wire spool (e.g., 1 mil Au wire). Load the specific thermal profile for the ceramic mass.
Key Parameter: Stage temperature set to 150°C - 200°C. Ceramic requires a longer soak time to reach equilibrium compared to FR4.
Acceptance Check: Perform a "bond-off" test on a coupon to verify tool planarity and ultrasonic coupling.

5. First Bond (Ball Bond on Die)

Action: The capillary descends, applies force and ultrasonic energy to form the ball bond on the semiconductor die.
Key Parameter: Free Air Ball (FAB) size (typically 2-2.5x wire diameter).
Acceptance Check: Visual check for "golf club" bonds or off-center balls.

6. Looping

Action: The capillary rises and moves to the second bond location, forming the wire loop.
Key Parameter: Loop height and shape factor (reverse motion) to prevent wire sway.
Acceptance Check: Ensure no wire sagging touches the die edge or adjacent wires.

7. Second Bond (Wedge Bond on Ceramic)

Action: The capillary stitches the wire to the ceramic bond pad. This is the most critical step for wire bonding on ceramic due to surface roughness issues.
Key Parameter: Scrub amplitude and time. Higher energy is often needed here than on the die.
Acceptance Check: "Fishtail" appearance of the wedge bond. No peeling or lifting.

8. Destructive Pull Testing (Sample Basis)

Action: Use a pull tester to apply upward force on the wire loop until failure.
Key Parameter: Pull speed and hook placement (mid-span).
Acceptance Check: Minimum pull strength (e.g., > 3 grams for 1 mil wire). Failure mode should be "wire break" (good), not "lifted bond" (bad).

9. Non-Destructive Visual Inspection

Action: Automated Optical Inspection (AOI) or manual microscope check.
Key Parameter: Magnification 30x - 100x.
Acceptance Check: Verify no missing wires, crossed wires, or cratering on the ceramic pads.

Failure modes & troubleshooting

When wire bonding on ceramic fails, the root cause is often traceable to the material interface or energy settings. APTPCB (APTPCB PCB Factory) engineers use the following logic to diagnose issues.

1. Non-Stick on Pad (NSOP) - Second Bond

Symptom: The wire lifts off the ceramic pad immediately after the capillary rises.
Causes: Contamination (epoxy bleed, oxidation), insufficient ultrasonic power, low stage temperature, or excessive surface roughness.
Checks: Inspect pad for discoloration (oxidation). Check plasma cleaner logs. Measure pad roughness.
Fix: Increase ultrasonic power/time slightly. Re-clean substrates with plasma.
Prevention: Implement stricter plasma cleaning schedules and check epoxy curing profiles to prevent outgassing.

2. Cratering (Ceramic Fracture)

Symptom: The bond pad peels off, taking a chunk of ceramic with it, or visible cracks appear under the bond.
Causes: Excessive ultrasonic power or bond force. Ceramic is brittle and cannot absorb impact like FR4.
Checks: Look for "divots" in the ceramic under the metal pad.
Fix: Reduce bond force and impact velocity. Use a "soft landing" parameter if available.
Prevention: Optimize the bond window (DOE) to find the lower limit of energy required for adhesion.

3. Heel Cracks

Symptom: The wire breaks at the "heel" of the second bond during pull testing.
Causes: Worn capillary tool, excessive deformation of the wire, or steep loop angles.
Checks: Inspect the capillary tip for wear/buildup. Measure bond width (squash).
Fix: Replace the capillary. Reduce bond force. Adjust loop trajectory to reduce tension at the heel.
Prevention: Establish a capillary change schedule based on bond count (e.g., every 500k bonds).

4. Lifted Ball (First Bond)

Symptom: The ball bond detaches from the die surface.
Causes: Intermetallic failure, contamination on the die, or incorrect Free Air Ball (FAB) size.
Checks: Inspect the underside of the lifted ball. If it's smooth, no intermetallic formed.
Fix: Increase initial bond force/power. Verify die metallization compatibility (Aluminum vs Gold).
Prevention: Ensure wafer storage is nitrogen-purged to prevent aluminum oxidation on bond pads.

5. Wire Sweep / Sagging

Symptom: Wires move sideways and touch each other, or sag onto the die edge.
Causes: Long wire loops, incorrect loop parameters, or airflow turbulence during encapsulation.
Checks: Measure loop height vs. wire length ratio.
Fix: Use stiffer wire (doped gold) or shorten the loop distance. Adjust "reverse motion" settings.
Prevention: Design bond pads closer to the die to minimize wire length (< 3mm recommended).

6. Low Shear Strength

Symptom: Ball bonds fail shear testing below specification, even if they stick visually.
Causes: Insufficient temperature (under-cured IMC), wrong capillary geometry.
Checks: Verify stage temperature is actually reaching the substrate surface (ceramic dissipates heat fast).
Fix: Increase soak time before bonding. Increase stage temperature.
Prevention: Use thermal mapping to ensure the bonding area is at the target temperature, not just the heater block.

Design decisions

Troubleshooting often leads back to initial design choices. When planning a project with APTPCB, consider these fundamental material decisions.

Material Selection: Alumina (Al2O3) vs. Aluminum Nitride (AlN)

Alumina (96%): The standard choice. Good electrical insulation, moderate thermal conductivity (24 W/mK). Suitable for most sensors and hybrid circuits. Easier to bond to due to mature thick-film processes.
Aluminum Nitride (AlN): High performance. Excellent thermal conductivity (170+ W/mK), matching silicon's CTE closely. Essential for high-power IGBTs or RF amps. However, AlN is more expensive and requires specialized metallization (DBA/DBC) which can be harder to wire bond if surface roughness isn't controlled.

Metallization: Thick Film vs. Thin Film

Thick Film: Paste is screen printed and fired. Resulting surface is rougher (Ra 0.3-0.5 µm). Requires aggressive bonding parameters. Lower cost.
Thin Film: Sputtered or evaporated metal. Very smooth (Ra < 0.1 µm). Ideal for fine-pitch wire bonding and high-frequency RF. Higher cost but higher yield for wire bonding.

Pad Geometry

Size: While 70µm is a minimum, 100µm x 100µm is preferred for robust process windows.
Clearance: Ensure the "travel path" of the capillary doesn't hit components. Ceramic circuits often have tall capacitors; the bonder head needs clearance.

FAQ

1. Can I use aluminum wire on ceramic substrates? Yes, aluminum wedge bonding is common for power applications (heavy wire) and COB. It is performed at room temperature (ultrasonic only), which avoids the high heat required for gold bonding. However, the pad metallization must be compatible (usually Aluminum or Nickel-Gold).

2. What is the difference between thick film and thin film for wire bonding? Thin film provides a much smoother surface and sharper edge definition, allowing for finer pitch and higher reliability bonds. Thick film is rougher and may require higher bond forces, increasing the risk of cratering the ceramic.

3. Why is plasma cleaning necessary? Ceramic substrates often accumulate organic contaminants from storage or previous processing steps (like die attach curing). Plasma cleaning removes these invisible layers at a molecular level, significantly increasing bond strength and reducing NSOP.

4. How does the thermal profile differ from FR4? Ceramic has high thermal mass and conductivity. It heats up and cools down faster than FR4 but draws heat away from the bond site rapidly. You typically need higher stage temperatures (up to 250°C) and longer pre-heat soak times to ensure the bond site is at the correct temperature.

5. What is the minimum pad size for wire bonding on ceramic? For standard 1 mil (25 µm) wire, a 70 µm x 70 µm pad is the absolute minimum. For high yield, 100 µm x 100 µm is recommended to account for placement tolerances and ball squash.

6. Is rework possible on ceramic substrates? Yes, but it is risky. If a wire fails, it can sometimes be removed and a new bond placed on the same pad ("security bond" or bonding over the remnant). However, repeated bonding attempts can cause cratering in the brittle ceramic.

7. How do I prevent "cratering" on ceramic? Cratering is caused by excessive ultrasonic energy or impact force fracturing the ceramic under the pad. To prevent it, optimize the bond parameters (reduce force/power), ensure the metallization is thick enough to act as a buffer, and use a controlled descent speed.

8. What is the shelf life of bondable ceramic substrates? Typically 6 to 12 months if stored in a nitrogen cabinet or vacuum-sealed bag. Oxidation of the nickel/gold surface over time will degrade bondability. If expired, plasma cleaning might restore bondability, but fresh plating is preferred.

9. Does APTPCB support heavy wire bonding for power electronics? Yes, heavy aluminum wire (5 mil - 20 mil) is supported for high-current applications. This requires different tooling and bond heads (wedge-wedge) compared to fine gold wire bonding.

10. How does die attach affect wire bonding? If the die attach material (epoxy or solder) bleeds onto the bond pads, bonding will fail. Furthermore, if the die attach has voids, the die may vibrate during ultrasonic bonding, absorbing the energy and causing a weak bond (the "spongy die" effect).

11. What is the standard pull strength requirement? Per MIL-STD-883, the minimum pull strength depends on wire diameter. For 1 mil (25 µm) gold wire, 3 grams is the absolute minimum, but a robust process should average > 8 grams.

12. Can I wire bond directly to bare ceramic? No. You must bond to a metallized pad (Gold, Aluminum, or Silver). The wire cannot fuse to the ceramic material itself.

13. What is the impact of surface roughness? Roughness interferes with the intimate contact required for atomic diffusion. If Ra > 0.5 µm, the wire may only contact the "peaks" of the surface, leading to a weak mechanical grip that fails under thermal cycling.

14. How does lead time compare to standard PCB assembly? Wire bonding on ceramic is a specialized process. While the bonding itself is fast, the tooling setup, plasma cleaning, and rigorous testing (pull/shear) add time. Consult our PCB manufacturing team for specific lead times.

Glossary (key terms)

Term	Definition
Ball Bond	The first bond formed in thermosonic bonding, shaped like a ball, typically on the die surface.
Wedge Bond	The second bond (stitch), flattened and shaped like a wedge, typically on the substrate pad.
Capillary	The ceramic tool tip that holds the wire and delivers ultrasonic energy.
Thermosonic	A bonding method combining Heat (Thermo), Ultrasonic energy (Sonic), and Force.
NSOP	Non-Stick On Pad. A failure mode where the wire fails to adhere to the substrate.
Cratering	Damage to the semiconductor or ceramic substrate material under the bond pad, usually a fracture.
Loop Height	The vertical distance from the die surface to the highest point of the wire loop.
Shear Test	A destructive test applying lateral force to the ball bond to measure adhesion strength.
Plasma Ashing	A cleaning process using ionized gas to remove organic matter from bond surfaces.
ENEPIG	Electroless Nickel Electroless Palladium Immersion Gold. A universal surface finish excellent for wire bonding.
IMC	Intermetallic Compound. The alloy layer formed between the wire and pad metal that creates the bond.
Flame Off (EFO)	Electronic Flame Off. The spark used to melt the wire tip into a ball before the first bond.
Thick Film	Metallization applied via screen printing paste, resulting in thicker, rougher traces.
Thin Film	Metallization applied via vacuum deposition, resulting in very thin, smooth traces.

Ceramic PCB capability: Ceramic PCB
X-ray inspection (wire bond / BGA QA): X-ray inspection
DFM guidelines: DFM guidelines

Conclusion

Wire bonding on ceramic is a critical capability for high-reliability, high-power, and RF electronics. It demands a shift in mindset from standard FR4 assembly—prioritizing surface topography, thermal management, and precise energy control. By adhering to the specifications for roughness (Ra < 0.3 µm) and validating with rigorous pull testing, engineers can achieve hermetic-grade reliability.

Whether you are prototyping a new RF module or scaling production for power electronics, APTPCB provides the specialized ceramic substrates and DFM support needed to ensure your wire bonding process succeeds.

For a detailed review of your ceramic stack-up and metallization choices, contact our engineering team today.

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